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Masking scheme against correlation power analysis on DES
YANG Zheng-wen, GUO Zheng,
2019, 36(9):1-6.
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Hardware implementation of a convolutional neural network for mobile terminal based on FPGA
LI Bing-chen, HUANG Lu,
2019, 36(9):7-11.
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12-lead ECG reconstruction using convolutional neural network
ZHU Xiao-ming, CHEN Lin-hai, ZHANG Shuai, WANG Yun-feng,
2019, 36(9):12-15.
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A high speed transmitter with 40 bits data and variable data-width and supported multi-protocols
LI Mao, JIA Chen, LUAN Wen-huan, LIN Xin, WANG Zi-qiang, ZHANG Chun, Wang Zhi-hua,
2019, 36(9):16-20.
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Energy-efficient nonvolatile SRAM design based on mltilevel RRAM
GU Jia-wei, SUN Ya-nan, HE Wei-feng,
2019, 36(9):21-25.
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An image enhancement algorithm based on improved LOG operator
LUO Ping, HU Guang-bao, LÜ Xia-fu, KANG Jian,
2019, 36(9):26-29.
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Improved self-adaptive constrained differential evolution algorithm
SU Zhao-yang, FENG Quan-xi, WEI Yan-ting, YUAN Sai-nan,
2019, 36(9):30-37.
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Loss function for ineffective learning reduction in End-to-End deep image segmentation network
YE Jing-wen, WU Xiao-feng,
2019, 36(9):38-43.
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ZUC algorithm protection scheme and hardware implementation of against second-order DPA analysis
ZHU Wen-feng, GUO Zheng,
2019, 36(9):44-49.
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A wind tunnel test method to realize store separation measurement based on SFM algorithm
WANG Tian-xu, WANG Shi-yu, WANG Zheng-qu,
2019, 36(9):50-54.
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Fault test algorithm based on pFlash
YANG Li-ting, WANG Qin, NI Hao, ZHAO Zi-jian,
2019, 36(9):55-60.
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Standardized, configurable universal design for onboard solid state memory controllers
ZHANG Wei-dong, DONG Zhen-xing, ZHU Yan, AN Jun-she,
2019, 36(9):61-66.
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Design and implementation of scheduling mechanism for high performance machine learning SIMT processor
JIA Rui, LI Tao, FENG Zhen-fu, ZHANG Hong-wei,
2019, 36(9):67-72.
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Pedestrian re-identification of nested pooling triple convolutional neural networks
WANG Lin, YANG Le,
2019, 36(9):73-78.
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Design and implementation of high performance SIMT processor for machine learning
ZHANG Hong-wei, LI Tao, FENG Zhen-fu, JIA Rui,
2019, 36(9):79-83.
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A proposed structure to improve SEE performance for 700 V Super-Junction VDMOS
WANG Lin, SONG Li-mei, WANG Li-xin, LUO Jia-jun, HAN Zheng-sheng,
2019, 36(9):84-88.
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Coordinate transformation blind equalization algorithm based on gated recurrent unit neural network
WEI Hai-wen, GUO Ye-cai,
2019, 36(9):89-93, 98.
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A yield diagnosis method basedon random forest for addressable WAT
LIU Yuan-xiu, SHI Zheng, ZHANG Pei-yong,
2019, 36(9):94-98.
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A new composite gate structure IEGT device design
HAN Jian, CHEN Bin, GU Yue-ji,
2019, 36(9):99-102, 108.
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Keywords spotting system based on deepwise separable convolutional neural network
WANG Shuai, PENG Yi-bing, Newest He,
2019, 36(9):103-108.
Abstract FullText HTML PDF