ZUC algorithm protection scheme and hardware implementation of against second-order DPA analysis
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Abstract
For the ZUC algorithm hardware implementation without protection, it is easy to influence the DPA attack.To this end, we propose a ZUC algorithm protection scheme based on second-order arithmetic addition, finite-domain sbox second-order full mask, sbox fixed mask and pseudo-wheel protection scheme, which can theoretically resist second-order DPA attacks.The ZUC algorithm protection scheme is implemented on the FPGA, and the hardware implementation is optimized to save power and area.We use the FPGA power consumption acquisition platform to collect the power consumption curve of the protected ZUC algorithm hardware, and perform DPA attacks on it. No correct key is attacked, indicating that our protection scheme is practical and effective, greatly increasing the power analysis attack difficulty.
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