Design of a low offset operational amplifier based on bias current compensation

An operational amplifier is designed based on bipolar process with low input offset voltage and low input bias current, which includes bias circuit, differential input circuit, intermediate circuit and output circuit. The differential input stage adopting cascode differential pairs can decrease offset voltage. Meanwhile, the base current compensation structure included in differential input stage can neutralize the influence of input bias current on peripheral circuitry and can increase circuit’s accuracy. The intermediate stage provides gain for the overall circuit and converts differential input signal to an output signal that is referenced to ground. The output stage, as Class AB structure that consumes low static power, improves circuit’s efficiency, boosts loading capability and provides more power for load. The circuit adopting Zena trimming can trim the chip after packaging, which can avoid second offset introduced after packaging. After taping out, the test results show that input offset voltage of less than 10 μV, input bias current of less than 3 nA, input offset current of less than 1.5 nA, large signal voltage gain of more than 110 dB at ±15 V power supplies.