A DEM design with balanced area and randomness

Aiming at the problem of current source array mismatch in high speed Digital-to-Analog Conversion (DAC), a Dynamic Element Matching (DEM) structure based on random combination is proposed to improve the conversion performance of DAC. The structure first divides the input data into high data and low data, and then the result of low data processed by Random Rotation-based Binary-weighted Selection (RRBS) structure is combined with high data for the second processing bit by bit and the final output is obtained. The structure is different when the input data is 3 bits and when the input data is larger than 3 bits. The Spurious Free Dynamic Range (SFDR) of the proposed structure is simulated by Matlab. Firstly, the SFDR comparison diagram of the structure under different segmentation methods and different errors is given. Then, different DEM structures are compared under different errors. Finally, the simulation comparison of the structure under different input frequencies and errors is carried out. The circuit synthesis results of the proposed structure under tsmc65 process are given. Under the same system cycle, the area occupied by the structure is smaller than that of the RRBS structure. Through simulation and synthesis, it can be seen that the proposed DEM structure circuit reduces the circuit area. Compared with 14 bits DAC without DEM, the structure can increase SFDR by more than 15 dB.