The Design Method of Sub-threshold Standard Cell Library
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Abstract
Because of commercial standard cell library can'toperate at ultra low supply voltages, in order to make the digital circuits operate at the minimum energy point, we selected 130 nm CMOS technology and investigated the design method of Sub-threshold standard cell library. Measurements show that all of the cells in the library operate at voltage below 90 mv. In order to father validate the stability of sub-threshold standard cell library, We presented an 4×8 process FIR filter, a test chip has been implemented in a selected 130 nm CMOS technology, and measurements show that the minimum energy operating point is at 0.25 V, consuming 150 nJ with the clock frequency of 100 Hz, the minimum voltage supply for the chip is 0.18 V.
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