Multibit Σ-Δ Modulator with Data Weighted Averaging Technique

A second order single-loop multibit Σ-Δ modulator was designed with a 2-bits quantizer inside, and it was used for digital audio application. The modulator used multibit quantization and the data weighted averaging (DWA) technique was adopted to reduce the nonlinearity introduced by multibit quantizer. The Σ-Δ modulator was fabricated in a MXIC's 0.35 μm mixed-signal CMOS process with 12 V supply voltage, and the input signal bandwidth was 50 kHz at oversampling rate (OSR) of 64. The post-simulation showed that the modulator can achieve 55.8 dB SNR and 60.4 dB SFDR with 5% capacitor mismatch. Contrast to close the DWA circuit, open the DWA circuit can increase 8 dB SNR and 13 dB SFDR. The whole modulator dissipates 48 mW, and the area of the modulator is just 0.6 mm².