A 10-W Class-D Audio Amplifier Output Stage

Based on pocess of CSMC 0.5μm 40V BCD, this paper presents an output stage for high power Class-D amplifier.The proper dead-time of gate drive is set to avoid the two power MOSFETs conducting at the same time and low 0.05% THD is achieved.By slowing down the edge variation of gate drive signal, the peak current of power MOS is reduced and the spike voltage of the supply is reduced to 0.24V.Considering both of conduction loss and switching loss, the optimum size of power MOS is confirmed.With reasonable layout area, the amplifier achieves 93% efficiency.