Analysis of Through Silicon Via Resistance-Open Fault Model

Through Silicon Via technology is a key technology for the development of three-dimensional integrated circuits, so it is very important to detect the defects in TSVs. In this paper, we discussed the physical model and delay model of the TSV, a resistance-open fault equivalent circuit model is also established in the Advanced simulation system(ADS) and extracted RLC parameters of the TSV. Then through applying signal source to the equivalent circuit model, we compare the output of the fault TSV with fault-free TSV and analyze the propagation delay of different degree of the fault TSV. We draw a curve judging the size of the crack with the method of the least squares.