Design and Implementation of RapidIO Based Networks-on-Chip Extension Interface

Networks-on-Chip (NoC) is considered to be a kind of viable on-chip communication fabrics for future Multiprocessor System-on-Chip (MPSoC).With increasing amount of processing elements,on-chip computing and communication performance is heavily influenced by inter-chip communication. A high-bandwidth, low-latency RapidIO-based extension interface is proposed to meet inter-chip communication requirement of NoC-based MPSoC. It is hierarchically designed to improve system flexibility while reducing hardware complexity.Experiment result shows that the hardware overhead of the extension interface is very small,and the effective bandwidth is 8.92 Gbps.