A Compiler Back-end for Multi-layer Heterogeneous Coarse-Grained Reconfigurable Architectures

In this paper, we present a novel task compiler back-end based on LLVM compiler framework but targeting a kind of multi-layer heterogeneous CGRA. Aiming at the processor which has distinct way accessing memory, we propose a new data structure called ConfigIR, which can analyze computation intensive programs, schedule parallel tasks and generate configuration codes eventually. Experiment shows that several computation intensive algorithms can get twice or three times speed up than serial processing.