Design of ternary logic gates and adder based on memristor

The existing ternary logic circuit of memristors cannot be cascaded and cannot store input and output values, which leads to the increase of area overhead and power consumption. Considering the characteristics of memristors and ternary logic, several ternary logic gates extended from MAGIC-Memristor-Aided Logic are proposed. Starting with the basic ternary logic gates, the ternary decoder and the ternary adder are realized. The circuit was verified by SPICE simulation software.The results show that the proposed circuit area overhead and power consumption are reduced compared with the existing literatures.