Design and Implementation of Hardware Accelerator for SURF Detection Based on HLS
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Abstract
SURF (Speeded up robust features) detection is used extensively in object detection, tracking and matching. However, it is computationally expensive and has poor real-time performance in general-purposed processors. Fortunately, SURF detection has high parallelism to be exploited. In this paper, hardware accelerator of SURF detection is implemented based on HLS to be executed on FPGAs. Experimental results show that SURF detection on FPGAs is much faster than that on CPUs. Furthermore, HLS is more productive and with better portability than traditional HDLs.
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