YUE Dan, XU Shu-yan, NIE Hai-tao, WANG Gang. Thermal Analysis and Simulation for RISC Processor Based on High-level LISA Power Model[J]. Microelectronics & Computer, 2015, 32(8): 125-129,134. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.026
Citation: YUE Dan, XU Shu-yan, NIE Hai-tao, WANG Gang. Thermal Analysis and Simulation for RISC Processor Based on High-level LISA Power Model[J]. Microelectronics & Computer, 2015, 32(8): 125-129,134. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.026

Thermal Analysis and Simulation for RISC Processor Based on High-level LISA Power Model

  • In order to optimize layout and packaging of IC chip, improve its performance and reliability and evaluate runtime regulation technology of operating temperature on processor-level, a real-time simulation method of calculating unit-based power consumption and runtime temperature is presented. By using high-level LISA power model, a runtime power consumption of generic applications on RISC processor is gained. Floorplan information about the RISC processor is obtained by Cadence Encounter software. HotSpot thermal analysis tool conducts fast, low-cost thermal analysis for RISC processor using the real-time power consumption, floorplan information and RISC chip's specifications as input information. The experiment results show that the method can accurately analyze heat distribution of the RISC chips and obtains the temperature data which can reflect the heat distribution during actual operation. It provides the most direct temperature information for optimizing layout and packaging of IC chip, analyzing its performance and reliability, etc.
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