Mixed-trace based simulation model and evaluation for AI processor

In recent years, tightly coupled AI processors have received extensive attention in resource-constrained edge-side intelligent processor applications. But when doing early design space exploration for the main coprocessor in the pipeline coupling relationship. There are the characteristics of shared hardware resource relationship, complex and diverse data path structure, and heterogeneity of on-chip main-cooperative computing features. This makes the simulation evaluation modeling for AI processors facing challenges. This paper focuses on the structural characteristics of tightly coupled AI processors. Abstract the hardware structure into a software simulation model framework. By analyzing the basic hardware resources of the main coprocessor, the different data paths controlled by the instruction are decomposed, and the AI processor simulation model is designed. The main processor and the coprocessor are used in trace simulation and model analysis, respectively. Introduce hybrid trace record timestamps to count widget access information. Then, combined with the analytical performance evaluation algorithm, the performance evaluation of the AI processor is realized. The experimental results show that the AI processor model and evaluation analysis based on the hybrid trace can effectively solve the actual execution results of AI computing, and evaluate the performance of the hardware, including important parameters such as delay, energy and power.