Abstract: Line Buffer Cache architecture, which adds a line buffer between Level 1 cache and IU, has the advantage of low energy consumption.But the scheme decreases the performance dramatically.The paper introduces the prefetch scheme to the Line Buffer Cache.A buffer is used to prefetch the instructions that reside in the L1 Cache.The method reduces the miss rate and the stalls of pipeline due to the low capacity, hence improves the performance.The Leon2 VHDL model is used as the environment to conduct the experiments, and the proposed architecture improves the performance by 12.4% on average.