李泉泉, 张铁军, 王东辉, 侯朝焕. 基于分支执行历史的循环缓冲低功耗方法[J]. 微电子学与计算机, 2014, 31(9): 7-10.
引用本文: 李泉泉, 张铁军, 王东辉, 侯朝焕. 基于分支执行历史的循环缓冲低功耗方法[J]. 微电子学与计算机, 2014, 31(9): 7-10.
LI Quan-quan, ZHANG Tie-jun, WANG Dong-hui, HOU Chao-huan. Branch Execution History Based Low Power Loop Buffering[J]. Microelectronics & Computer, 2014, 31(9): 7-10.
Citation: LI Quan-quan, ZHANG Tie-jun, WANG Dong-hui, HOU Chao-huan. Branch Execution History Based Low Power Loop Buffering[J]. Microelectronics & Computer, 2014, 31(9): 7-10.

基于分支执行历史的循环缓冲低功耗方法

Branch Execution History Based Low Power Loop Buffering

  • 摘要: 针对嵌入式处理器中指令Cache功耗显著的特点,提出了一种基于分支执行历史的循环缓冲低功耗方法.利用分支指令当前信息与分支执行历史信息之间的关系,实现了应用程序中循环的动态检测与加载.通过对取指通道的精确控制,该方法能够过滤大部分不必要的指令Cache访问,有效降低了指令Cache的功耗.在SuperVEF01DSP上的实验结果表明,采用该方法后,在处理器性能没有损失的情况下,指令Cache功耗平均降低32.58%,面积仅增加8.31%.

     

    Abstract: Instruction cache is one of the main power consumption components in embedded processor.This paper proposes a loop buffering method based on branch execution history to save the instruction cache power consumption.The loops in application program are detected and loaded dynamically by using the relationship between branch current information and branch execution history.With precise control of the instruction fetch datapath,this approach can filter a majority of unnecessary instruction cache accesses,thus saving the instruction cache power consumption significantly.Experimental results of SuperVEF01DSP show that this approach could save 32.58% of instruction cache power consumption,with only 8.31% of instruction cache area increasing and no performance degradation.

     

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