Abstract: For a nuclear detector with a 1nF sensing capacitor and a random current pulse with an average amplitude of 5μA, this article designs an analog front end based on a transimpedance amplifier (TIA). The core amplifier uses a single-ended folded cascode structure to increase its bandwidth and speed, and uses gain-boosted technology to achieve its high gain requirements. The analog front-end is designed and implemented based on the SMIC 40nm CMOS process. The simulation results show that the core amplifier has a gain-bandwidth product of 2.2 GHz and a gain of 72.3 dB at a power supply voltage of 1.1 V. When the analog front-end has a closed-loop gain of 500 Ω and a 1 nF sensing capacitor, it has a closed-loop bandwidth of 22 MHz, the total power consumption of the analog front-end is 3.2 mW.