一种用于CMMB的可变增益LNA的设计

Design of a Variable Gain LNA Applied in CMMB

摘要: 采用0.13μm CMOS工艺设计了一种应用于CMMB的可变增益的低噪声放大器（low noise amplifier， LNA）.LNA工作于2.635~2.66 GHz，采用低增益和高增益两种控制模式，其中高增益为主要工作模式.设计使用cadence软件进行前仿真和后仿真，随后对其进行了流片和封装测试.测试结果显示，在高增益时，S₂₁为9.25~9.42 dB，NF为1.99~2.26 dB，IIP3为1.25 dB.使用1.2 V电源供电，直流功耗为7.38 mW.低增益时 S₂₁为-5.85 dB到-5.70 dB，N F为7.90 dB到8.99 dB，IIP3为14.19 dB.

Abstract: A variable gain low noise amplifier (LNA) has been implemented in 0.13μm CMOS technology to support CMMB standards.This LNA works from 2.635 GHz to 2.66 GHz,and is divided into low gain mode and high gain mode which is mainly used.With the help of cadence software,pre-simulation and post-simulation was done.And then the chip was taped out and packaged before being measured.Chip measurement shows that,in the mainly used high gain,S₂₁ is from 9.25 to 9.42 dB,NF is from 1.99 to 2.26 dB,IIP3 is 1.25 dB.Power dissipation is 7.38 mW with while the power supply is 1.2 V.In the low gain,S₂₁ is from-5.85 dB to-5.70 dB,NF is from 7.90 dB to 8.99 dB,IIP3 is 14.19.