Abstract: A second-order sigma-delta modulator for digital audio operational chip is designed in this paper. The modulator is proposed to increase the oversampling rate with a stable second-order structure in order to improve the ADC resolution. The schematic simulation and analysis is by the tools of Hspice and MATLAB with HJTC 0.18μm CMOS technology. The second-order switched-capacitor modulator with oversampling rate of 256 is designed at the 1.8V power supply. Finally, it is shown circuit simulation results of the sigma-delta modulator whose signal-noise rate is 92.5dB and resolution is 16bits.