牛砚波, 蒋安平. 一种低功耗抗差分功耗分析攻击的SM4算法实现[J]. 微电子学与计算机, 2014, 31(9): 28-32,38.
引用本文: 牛砚波, 蒋安平. 一种低功耗抗差分功耗分析攻击的SM4算法实现[J]. 微电子学与计算机, 2014, 31(9): 28-32,38.
NIU Yan-bo, JIANG An-ping. A Low Power Implementation of SM4 Cipher with Resistance to Differential Power Analysis Attack[J]. Microelectronics & Computer, 2014, 31(9): 28-32,38.
Citation: NIU Yan-bo, JIANG An-ping. A Low Power Implementation of SM4 Cipher with Resistance to Differential Power Analysis Attack[J]. Microelectronics & Computer, 2014, 31(9): 28-32,38.

一种低功耗抗差分功耗分析攻击的SM4算法实现

A Low Power Implementation of SM4 Cipher with Resistance to Differential Power Analysis Attack

  • 摘要: 128位的SM4算法是我国公布的第一个商用密码算法,主要应用于无线局域网.为了提高算法的抗差分功耗分析攻击能力,SM4算法采用了加法掩码的方法来抵抗一阶差分功耗分析攻击.通过功耗分析攻击实心眼可以发现,加法掩码后的SM4算法能够有效地抵抗差分功耗分析攻击.为了实现一款面积小、功耗低SM4算法硬件电路,SM4S盒硬件电路采用了PPRM结构.在SMIC 0.18μm的工艺库下功耗仿真值为0.74mW@10MHz,PPRM结构的S盒与复合域方法实现的S盒相比功耗减少了70%.

     

    Abstract: The 128-bit SM4 algorithm is the first commercial cipher published by China,which is mainly used in wireless LAN.In order to improve the algorithm's resistance to differential power analysis attack,the additive masking is adopted to keep the SM4 cipher resistant to the first-order DPA.The simulation results show that the counteractive against differential power analysis attack is credible.In order to realize a small-area,low-power circuit of SM4 cipher,the PPRM architecture is adopted in the hardware implementation of SM4S-box.A power consumption of 0.74mW@10MHz using SMIC 0.18μm technology is achieved,which is 70% less than that of the SM4S-Box in composite field.

     

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