Abstract: To improve the integration density of RF front-end modules and reduce the cost of wireless communication terminals, a 2.4GHz RF front-end chip is designed and fabricated based on 0.18um CMOS process. The chip incorporates a power amplifier, a low noise amplifier, a SPST switch, a bandgap circuit and digital control circuit. The impedance matching networks of the PA and the LNA are all implemented on chip. The test results show that in the receiving mode, the chip gain is 11.2dB, the input \ output return loss is -5.8dB and -21.1dB respectively, and the IIP3 is 3.9dbM. In the transmission mode, the chip gain is up to 26.8dB, the input \ output return loss is -21dB and -14.2dB respectively, the output 1dB compression point is 23.5dbm, and the peak PAE is up to 24%. The chip possesses application prospect for 2.4GHz wireless communication systems.