Abstract: This paper uses adaptive power transistor technology to implement a higher performance on-chip low-dropout linear regulator (LDO), in which the error amplifier adds a dynamic bias structure while introducing a transient boost stage, making the integrated LDO has a fast transient response during load transitions that stabilizes the output voltage. The LDO is designed based on the 0.18um standard CMOS process. The simulation results show that the LDO can stably output 0~100 mA load current under the condition of 3 V power supply voltage, 1.2 V output voltage and 100 pF load capacitance, achieving full load stability. And when the load current jumps from 0 to 100 mA within 200 ns, the peak value of the transient output voltage changes to within 150 mV.