刘学政, 张盛兵, 黄小平. 支持短向量的32位快速加法器设计[J]. 微电子学与计算机, 2010, 27(9): 40-44.
引用本文: 刘学政, 张盛兵, 黄小平. 支持短向量的32位快速加法器设计[J]. 微电子学与计算机, 2010, 27(9): 40-44.
LIU Xue-zheng, ZHANG Sheng-bing, HUANG Xiao-ping. Design of a 32-bit Fast Adder for Short Vectors[J]. Microelectronics & Computer, 2010, 27(9): 40-44.
Citation: LIU Xue-zheng, ZHANG Sheng-bing, HUANG Xiao-ping. Design of a 32-bit Fast Adder for Short Vectors[J]. Microelectronics & Computer, 2010, 27(9): 40-44.

支持短向量的32位快速加法器设计

Design of a 32-bit Fast Adder for Short Vectors

  • 摘要: 研究和设计了一种面向多媒体应用的32位短向量快速加法器,该加法器以SK型并行前缀加法器为基础,通过有效控制进位链,实现了同时执行4个基于字节的加法,或者2个基于半字的加法,或者1个基于字的加法,或者1个基于单精度浮点数的比较运算.综合结果表明,此设计方法同传统的设计方法相比,电路面积接近,时序提高了10%,总体性能较优.

     

    Abstract: This paper studies and designs a novel 32-bit short vectors fast adder for multimedia application.The adder, which is based on Sklansky Parallel-Prefix adder,by controlling the carry chain,realizes both of four and two paralleled addition operations,with 8-bit and 16-bit addends respectively.It also supports one addition operation with 32-bit addends, as well as the comparison operation between single-precision floating-point data.Synthesis shows that,compared with traditional design,the overall performance of our novel adder is better,with a circuit area approach and a timing improved by 10 percent.

     

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