王宇飞, 邹小东. 基于FPGA的MTM总线监控系统的设计与实现[J]. 微电子学与计算机, 2017, 34(3): 61-64, 69.
引用本文: 王宇飞, 邹小东. 基于FPGA的MTM总线监控系统的设计与实现[J]. 微电子学与计算机, 2017, 34(3): 61-64, 69.
WANG Yu-fei, ZOU Xiao-dong. Research and Implementation of MTM BUS Monitoring System Based on FPGA[J]. Microelectronics & Computer, 2017, 34(3): 61-64, 69.
Citation: WANG Yu-fei, ZOU Xiao-dong. Research and Implementation of MTM BUS Monitoring System Based on FPGA[J]. Microelectronics & Computer, 2017, 34(3): 61-64, 69.

基于FPGA的MTM总线监控系统的设计与实现

Research and Implementation of MTM BUS Monitoring System Based on FPGA

  • 摘要: IEEE P1149.5测试与维护总线标准, 简称MTM总线, 是针对多板卡电子系统提出的测试总线标准, 对提高系统的可靠性和可维护性具有重要的实用意义.本系统使用FPGA实现了MTM总线控制器以及与上位机接口功能模块, 采用32位高性能软核处理器Nios Ⅱ作为接口模块的控制核心, 通过W5300以太网芯片与上位机通信进行通信.使用在线调试工具identify对实测结果进行采样, 系统级测试结果表明该监控系统的所有功能可正确执行.

     

    Abstract: IEEE P1149.5 standard test and maintenance bus, also known as MTM bus, is a standard of testing bus designed for the electronic system of circuit boards and has important significance for improving the reliability and maintainability of the system. This system uses FPGA to implement MTM bus controller and the PC interface module and uses 32-bit high-performance soft core processor Nios Ⅱ as the core of interface module and communicates with the PC via W5300 chip. This system samples the singals by online debugging tool called identify. System-level testing shows that all of the system functions can be executed correctly.

     

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