Abstract: During the evolution of digital logic circuit, genetic algorithm(GA)possess a slow evolution, plunges into local optimal solution and produces premature convergence phenomenon easily.To solve these problems, a kind of multi-objective optimization evolutionary algorithm(MOEA), strong Pareto evolutionary algorithm 2(SPEA2)which utilized for the evolution is given.The scheme constructs a platform on FPGA based on Virtual reconfigurable circuit(VRC)and employs Microblaze soft core to implement the evolutionary algorithms for the evolution of the target circuit.The evolution of two multiplier proves global searching ability of the proposed algorithm and demonstrates that the algorithm can effectively reduce the number of iterations to search the global optimal solution.Experiments shows that the proposed algorithm can improve the efficiency of evolution of the circuit scale and design to a certain extent.