李琦, 王卫东, 赵秋明, 晋良念. 薄型双漂移区高压器件新结构的耐压分析[J]. 微电子学与计算机, 2012, 29(2): 129-132,137.
引用本文: 李琦, 王卫东, 赵秋明, 晋良念. 薄型双漂移区高压器件新结构的耐压分析[J]. 微电子学与计算机, 2012, 29(2): 129-132,137.
LI Qi, WANG Wei-dong, ZHAO Qiu-ming, JIN Liang-nian. Breakdown Voltage Analysis of High Voltage Device With Thin Double Drift Region[J]. Microelectronics & Computer, 2012, 29(2): 129-132,137.
Citation: LI Qi, WANG Wei-dong, ZHAO Qiu-ming, JIN Liang-nian. Breakdown Voltage Analysis of High Voltage Device With Thin Double Drift Region[J]. Microelectronics & Computer, 2012, 29(2): 129-132,137.

薄型双漂移区高压器件新结构的耐压分析

Breakdown Voltage Analysis of High Voltage Device With Thin Double Drift Region

  • 摘要: 提出与CMOS工艺兼容的薄型双漂移区 (TD) 高压器件新结构.通过表面注入掺杂浓度较高的N-薄层, 形成不同电阻率的双漂移区结构, 改变漂移区电流线分布, 降低导通电阻;沟道区下方采用P离子注入埋层来减小沟道区等位线曲率, 在表面引入新的电场峰, 改善横向表面电场分布, 提高器件击穿电压.结果表明:TD LDMOS较常规结构击穿电压提高16%, 导通电阻下降31%.

     

    Abstract: A novel high voltage device with thin double drift region (TD) is proposed, which is compatible with CMOS technology.The double drift region with different resistivity is formed through implanting N-layer of high doping concentration on the surface of the device.The on-resistance is lowered due to the change of current line distribution, and the curvature effect in the channel and distribution of the surface electric field are improved by P buried layer under the channel, which results in higher breakdown voltage.The results indicate that the breakdown voltage of TD device is increased by 16% and on-resistance decreased by 31% in comparison to conventional LDMOS.

     

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