AVS解码中反量化的FPGA实现

Implementation with FPGA Based on IQ for AVS Decoding

摘要: 对AVS反量化算法模块进行分析,结合AVS反量化的算法特点,提出了使用较少存储空间来存储量化表数据的方法.通过编写VHDL以实现优化后的AVS解码中反量化的算法,利用FPGA开发工具ISE7.1和仿真工具ModelSim SE6.0,完成了AVS反量化的FPGA设计与实现.证明了算法实现的正确性.

Abstract: Analysising the mudule of the AVS inverse quantization, a method of using less Rom to save data in Quantization Table is proposed in this paper. Through the preparation of VHDL in order to implement the optimized inverse algorithm for AVS decoding, By means of the FPGA tool ISE7.1 and ModelSim SE 6.0, inverse quantization for AVS decoding base on FPGA can be implemented. The result of simulation is given in this paper which the Validity of the algorithm has been proved.