动态可重构阵列处理器数据流处理单元的设计与实现
The Design and Implementation of Data Flow Processing Unit of Dynamical Reconfigurable Array Processor
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摘要: 阵列处理器是一种满足高效能需求、适应未来工艺发展的并行计算结构.基于动态可重构阵列处理器架构, 提出了一种基于数据流驱动的处理单元高效硬件实现结构, 并完成了四抽头低通滤波器的电路映射及仿真, 最后基于Xilinx V6开发板的综合结果进行了性能分析.Abstract: Array processor is a kind of parallel computing architecture meeting the demand of high performance and adapting the development of technology in the future.This paper proposed a kind of high efficient architecture of processing unit based of data flow driven, completed the mapping and simulation of four tap low-pass filter.Finally, performance analysis was provided according to the synthesize result based on Xilinx v6 development board.