周君宇, 赵仲元, 绳伟光, 何卫锋. 一种针对可重构处理器流水线简化编程的设计范式[J]. 微电子学与计算机, 2016, 33(9): 6-9.
引用本文: 周君宇, 赵仲元, 绳伟光, 何卫锋. 一种针对可重构处理器流水线简化编程的设计范式[J]. 微电子学与计算机, 2016, 33(9): 6-9.
ZHOU Jun-yu, ZHAO Zhong-yuan, SHENG Wei-guang, HE Wei-feng. A Design Pattern Targeting to Simplifying Pipeline Design Used on Course-Grained Reconfigurable Processor[J]. Microelectronics & Computer, 2016, 33(9): 6-9.
Citation: ZHOU Jun-yu, ZHAO Zhong-yuan, SHENG Wei-guang, HE Wei-feng. A Design Pattern Targeting to Simplifying Pipeline Design Used on Course-Grained Reconfigurable Processor[J]. Microelectronics & Computer, 2016, 33(9): 6-9.

一种针对可重构处理器流水线简化编程的设计范式

A Design Pattern Targeting to Simplifying Pipeline Design Used on Course-Grained Reconfigurable Processor

  • 摘要: 提出了一种面向可重构处理器流水线的设计范式, 并在clang编译架构的基础上添加新的语法, 使得用新语法编写流水线程序的时候, 能把代码量压缩为原来的10%~20%, 并且让代码结构更加清晰和便于理解.

     

    Abstract: This paper propose a new design pattern for simplifying the pipeline design used on Course-Grained Reconfigurable Processor and develop a new compiler based on the clang system. Experiment results show that the amount of code decrease to 10%~20% after applying this designed pattern. Futher more, the new design pattern makes the code clearer and more comprehensive.

     

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