基于28 nm CMOS工艺的鉴频鉴相器和电荷泵设计
The Design of Phase Frequency Detector and Charge Pump Based on 28 nm CMOS Process
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摘要: 基于SMIC 28 nm CMOS工艺, 完成了高性能鉴频鉴相器和电荷泵的设计.采用D触发器型鉴频鉴相器结构, 通过优化其门电路结构, 获得了一种两路输出信号具有良好匹配性能的鉴频鉴相器.采用源极开关的电荷泵结构, 同时在该结构中采用轨到轨输入级的运放, 获得了一种在较大的输出电压范围内都具有低失配电流的电荷泵.Abstract: The design of high-performance Phase Frequency Detector and Charge Pump based on SMIC 28 nm CMOS process has been achieved in this paper. By using D flip-flop PFD and optimizing structure of the gate, a PFD has been accomplished, which two output had a good matching performance. To obtain a CP with low mismatch current under the larger range of output voltage, source-switch CP structure and an operational amplifier with a rail-to-rail input stage were used.