Abstract: This paper proposes a novel generic memory model written in SystemC as a generic SystemC IP.The model has unified transaction -level interface,while the internal controlling logic and memory organization are cycle-precision.There are subtle parameters to configure the model so that the bandwidth,latency and arbitration rule can be controlled to explore design space.The model has successfully predicted the performance loss caused by a shared memory in a video decoding hardware design when the number of banks to build the memory changes.