Abstract: This paper presents a dual-mode delta-sigma(ΔΣ)modulator.The modulator can be configured for two structures, 3rd-order 4-bit in low-frequency high-resolution applications, and 2nd-order 4-bit in high-frequency lowresolution applications.Most of the circuit parts including the capacitors and switches are shared in both modes.An efficient OTA and comparators with Input Offset Calibration(IOS)technique are adopted.The modulator is fabricated in0.18μm CMOS technology.It achieves 77.1dB and 108.9dB peak signal-to-noise and distortion ratio(SNDR)separately in two modes with 39 kHz and 1.25 MHz input signal bandwidth.The power consumption is about 12 mW.