基于硬件模拟的 SAT 求解框架

何安平, 毛乐乐, 谌知学, 吴尽昭. 基于硬件模拟的 SAT 求解框架[J]. 微电子学与计算机, 2016, 33(9): 124-127.

引用本文:

何安平, 毛乐乐, 谌知学, 吴尽昭. 基于硬件模拟的 SAT 求解框架[J]. 微电子学与计算机, 2016, 33(9): 124-127.

HE An-ping, MAO Le-le, CHEN Zhi-xue, WU Jin-zhao. A Hardware Framework of SAT Solver[J]. Microelectronics & Computer, 2016, 33(9): 124-127.

Citation:

HE An-ping, MAO Le-le, CHEN Zhi-xue, WU Jin-zhao. A Hardware Framework of SAT Solver[J]. Microelectronics & Computer, 2016, 33(9): 124-127.

A Hardware Framework of SAT Solver

摘要: 使用硬件方法求解SAT问题, 采用现场可编程门阵列(FPGA)技术, 针对大规模实际系统的CNF公式实例, 定制化编译和转换为FPGA芯片, 并完全依据FPGA硬件完成SAT满足性求解过程.

Abstract: In this paper, we customized the FPGA chip to fit the SAT problem, e.g., translating and compiling the large scale system, and then seccessfully solved the problem by FPGA autonomously.

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