陈天佐, 陈岚, 王海永, 吕志强. 一种9bit、8Gs/s的超高速跟踪保持放大器设计[J]. 微电子学与计算机, 2014, 31(4): 132-135.
引用本文: 陈天佐, 陈岚, 王海永, 吕志强. 一种9bit、8Gs/s的超高速跟踪保持放大器设计[J]. 微电子学与计算机, 2014, 31(4): 132-135.
CHEN Tian-zuo, CHEN Lan, WANG Hai-yong, LU: Zhi-qiang. A 9 bit 8 Gs/s Very High Speed Track and Hold Amplifier Design[J]. Microelectronics & Computer, 2014, 31(4): 132-135.
Citation: CHEN Tian-zuo, CHEN Lan, WANG Hai-yong, LU: Zhi-qiang. A 9 bit 8 Gs/s Very High Speed Track and Hold Amplifier Design[J]. Microelectronics & Computer, 2014, 31(4): 132-135.

一种9bit、8Gs/s的超高速跟踪保持放大器设计

A 9 bit 8 Gs/s Very High Speed Track and Hold Amplifier Design

  • 摘要: 提出一种9bit、8Gs/s的超高速跟踪保持放大器(THA)设计.该超高速跟踪保持放大器采用差分结构,对采样模块电路进行了改进,采用二极管连接的三极管和电容进行馈通效应补偿和非线性补偿,减小了跟踪保持放大器总谐波失真,提高了整体分辨率.基于0.18μm SiGe BiCM OS工艺,该跟踪保持放大器的总谐波失真约为-58.6dB,分辨率为9.4bit,跟踪模式带宽为4.6GHz,功耗为65mW.

     

    Abstract: A new design of 9 bit 8 Gs/s very high speed track-and-hold amplifier (THA) is presented.Differential architecture is used in the design,and the compensation of hold mode feedthrough and nonlinearity is realized through diode-connected transistor and capacitor.The total harmonic distortion is reduced and resolution is enhanced.Based on 0.18μm SiGe BiCMOS process,simulations show that THD of the THA is-58.6 dB,resolution is 9.4 bit,track mode bandwidth is 4.6 GHz,and power consumption is 65 mW.

     

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