Abstract: In view of instructions dependence detection module with large area, long time delay and high power consumption features in existing processor, a new instructions dependence detection and dispose method for Digital Signal Processor (DSP) is proposed to solve the problem. The method could detect the dependence between instructions in the same cycle, and also instructions dependence in different pipelines by setting a set of locking signal. Dynamic scheduling is implemented in this way. Using the fused microarchitecture integrating both Very Long Instruction Word (VLIW) and superscalar could dispose the dependence without extra hardware. The feasibility of this method is proved by examples based on the GEM5 simulator system.