Abstract: In the video signal processing SoC the processor and many interface drivers are in asynchronous clock domains and this may have metastable problem, this paper analyses the reasons of metastability, study on Gray code、synchronizer、FIFO technology.Combined with the structure of VLIW video signal processing SoC, we design FIFO and frame buffer models, the results of experiment show that the solution put forward by this paper is conducive to ensure the stability of communication between the processor and interface drivers in the SoC, rather than metastability happened.