李磊, 张春妹, 赵翠华, 张洵颖, 龚龙庆. 一种FPGA配置加载管理电路的设计与实现[J]. 微电子学与计算机, 2015, 32(8): 146-149,153. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.031
引用本文: 李磊, 张春妹, 赵翠华, 张洵颖, 龚龙庆. 一种FPGA配置加载管理电路的设计与实现[J]. 微电子学与计算机, 2015, 32(8): 146-149,153. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.031
LI Lei, ZHANG Chun-mei, ZHAO Cui-hua, ZHANG Xun-ying, GONG Long-qing. Design and Implementation of FPGA Configuration Circuit[J]. Microelectronics & Computer, 2015, 32(8): 146-149,153. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.031
Citation: LI Lei, ZHANG Chun-mei, ZHAO Cui-hua, ZHANG Xun-ying, GONG Long-qing. Design and Implementation of FPGA Configuration Circuit[J]. Microelectronics & Computer, 2015, 32(8): 146-149,153. DOI: 10.19304/j.cnki.issn1000-7180.2015.08.031

一种FPGA配置加载管理电路的设计与实现

Design and Implementation of FPGA Configuration Circuit

  • 摘要: 基于Xilinx Virtex系列FPGA提供的Slave SelectMAP配置加载模式,针对FPGA上电后需要配置和重配置比特流文件,提出了一种FPGA配置加载管理电路的设计结构,并采用VHDL语言对设计进行了硬件描述.该电路最多可支持四路FPGA通过Slave SelectMAP模式进行配置加载,同时支持多种类型FLASH存储器对比特流文件的存储.用户可根据需求,灵活地选择一路或多路FPGA所需的存储器类型.采用SMIC 0.18 μm工艺对电路进行流片,测试结果表明,该电路结构简单、性能稳定、通用性强,满足空间电路系统的要求,可嵌入到星载电路中.

     

    Abstract: The paper presents a structure of circuit, which can configure and reconfigure FPGA with bitstream data when powers on, on the basis of the Salve SelectMAP mode of Xilinx Virtex FPGA. Moreover, VHDL is used to depict the hardware of design. The circuit can configure not more than 4 paths Virtex FPGA with the configuration file in Slave SelectMAP mode. At the same time, it's compatible with various types of flash to save bitstream data. Users can choose any type of memory to match with one or more paths FPGA flexibly, to fulfill their requirements. Adopting the 0.18um technology of SMIC to tapeout. According to the results of test, the circuit is characterized by simple structure, stable performance, good generality, and it can meet the requirements of space circuits system and be embed in the satellite load circuits.

     

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