动态可重构总线测试系统的模块设计
Modular Design of the UM-BUS Test System
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摘要: 动态可重构总线UM-BUS是一种以多通道并发冗余实现动态容错的新型高速串行总线,其测试系统通过对总线数据的采集和处理,完成无过滤监听数据、总线状态分析等测试功能.总线测试系统针对有效带宽为149.5 MB/s的8通道UM-BUS总线,设计高速缓存方案和通信方案,主要通过对数据的分类多级缓存和USB3.0传输方式,实现PC对总线数据的实时采集.结果表明,测试系统能够对UM-BUS总线的高速数据进行实时采集和存储,数据可靠性也得到验证,为实现总线状态分析和有过滤监听等功能做好准备.Abstract: Dynamically reconfigurable high-speed serial bus UM-BUS can reconfigure itself to achieve fault tolerance with multi-channel concurrent redundancy. UM-BUS test system is responsible for data monitoring and bus statue analyzing through collect and process bus data. The effective bandwidth of UM-BUS can up to 149.5MB/s at 8 lanes. In order to collect the high speed data on 8 lanes bus, the cache and USB3.0 are designed in the test system to store and transmit data. The experiment result indicates that the test system has ability to collect high speed UM-BUS data reliably. The performance of UM-BUS test system lays the foundation of bus statue analyzing and specific monitoring.