张皓然,焦子豪,吴江,等.一种迟滞电压线性可编程比较器设计[J]. 微电子学与计算机,2024,41(2):84-90. doi: 10.19304/J.ISSN1000-7180.2023.0032
引用本文: 张皓然,焦子豪,吴江,等.一种迟滞电压线性可编程比较器设计[J]. 微电子学与计算机,2024,41(2):84-90. doi: 10.19304/J.ISSN1000-7180.2023.0032
ZHANG H R,JIAO Z H,WU J,et al. A comparator with linear programmable hysteresis voltage[J]. Microelectronics & Computer,2024,41(2):84-90. doi: 10.19304/J.ISSN1000-7180.2023.0032
Citation: ZHANG H R,JIAO Z H,WU J,et al. A comparator with linear programmable hysteresis voltage[J]. Microelectronics & Computer,2024,41(2):84-90. doi: 10.19304/J.ISSN1000-7180.2023.0032

一种迟滞电压线性可编程比较器设计

A comparator with linear programmable hysteresis voltage

  • 摘要: 提出了一种迟滞电压线性可编程型比较器,该电路在比较器的输出端口加入反馈结构,通过控制反馈电流支路的注入个数,使得比较器在设计范围内具有线性可控的迟滞电压,在不同应用环境下可实现抗噪与反应速度的最优组合,解决了高速测试过程中对迟滞电压可线性编程的需求。该迟滞电压线性可编程比较器电路在40 nm互补金属氧化物半导体(Complementary Metal Oxide Semiconductor, CMOS)工艺下实现。仿真结果表明,在3.3 V工作电压、27 ℃环境温度、tt工艺角条件下,电路的最大功耗为102.4 μW,传输延迟为10 ns,在补偿电流个数取2到6时,迟滞电压线性控制效果最明显。

     

    Abstract: A linear programmable hysteresis voltage comparator is proposed. The feedback structure is added to the output port of the comparator. By controlling the number of feedback current branches, the comparator has linear controllable hysteresis voltage within the design range, making it possible that the optimal combination of anti-noise and reaction speed can be realized in different application environments, which solves the requirement of linear programming hysteresis voltage in the process of high-speed testing. The hysteresis voltage linear programmable comparator circuit is implemented in 40 nm Complementary Metal Oxide Semiconductor(CMOS) technology. The simulation results show that under the conditions of 3.3 V working voltage, 27 ℃ ambient temperature and tt process angle, the maximum power consumption of the circuit is 102.4 μW, the transmission delay is 10 ns, and meanwhile, when the number of compensation currents is 2 to 6, the linear control effect of hysteresis voltage is the most obvious.

     

/

返回文章
返回