电子封装领域的仿真研究现状及挑战

张墅野; 何鹏; 邵建航; 梁凯洺; 孟俊豪; 李帅; 邢靖远; 程靖宇; 贾昕睿

doi:10.19304/J.ISSN1000-7180.2022.0563

电子封装领域的仿真研究现状及挑战

doi: 10.19304/J.ISSN1000-7180.2022.0563

哈尔滨工业大学材料科学与工程学院, 黑龙江哈尔滨 150001

基金项目: 中国科学院硅器件技术重点实验室开放基金（KLSDTJJ2022-5）；国家重点研发计划（2020YFE0205304）；重庆市自然科学基金项目资助（cstc2021jcyj-msxmX1002）；中央高校基本科研业务费专项资金（AUGA5710051221）；黑龙江省自然科学基金资助项目（YQ2022E024）

详细信息

作者简介:
张墅野：男,（1988-）,博士研究生,副教授. 研究方向为电子封装与制造

邵建航：男,（1999-）,硕士研究生. 研究方向为电子封装与制造

梁凯洺：男,（2001-）,研究方向为电子封装与制造

孟俊豪：男，（2001-）,研究方向为电子封装与制造

李帅：男，（2001-）,研究方向为电子封装与制造

邢靖远：男,（2000-）,研究方向为电子封装与制造

程靖宇：男,（2001-）,研究方向为电子封装与制造

贾昕睿：女,（2001-）,研究方向为电子封装与制造

通讯作者:
男，（1972-），博士研究生，教授. 研究方向为电子封装与制造. E-mail：hepeng@hit.edu.cn

中图分类号: TN402
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- 文章访问数: 75
- HTML全文浏览量: 37
- PDF下载量: 14
- 被引次数: 0
出版历程
- 收稿日期: 2022-09-14
- 修回日期: 2022-11-16
- 网络出版日期: 2023-01-18

Research status and challenges of simulation technology in electronic packaging

School of Material and Science Engineering, Harbin Institute of Technology, Harbin 150001, China

Funds: This work was financially supported by the opening fund of Key Laboratory of Science and Technology on Silicon Devices, Chinese Academy of Sciences (KLSDTJJ2022-5)，the National Key Research and Development Program of China (2020YFE0205304)，Natural Science Foundation of Chongqing, China (cstc2021jcyj-msxmX1002)，the Fundamental Research Funds for the Central Universities (AUGA5710051221), Heilongjiang Provincial Natural Science Foundation of China (YQ2022E024)

摘要

摘要:
随着微电子芯片的不断发展,对其的性能需求也日益提高,而性能需求的提升也使得对芯片中晶体管尺寸和集成度的要求也不断上升. 在后摩尔时代,芯片小型化使芯片的制造的成本和工艺要求也逐渐上升,面对这种情况,电子封装技术也更多地在实现多元化、集成化以及规模化的芯片封装功能中发挥着作用. 在电子封装技术的研究中,如何更好地预测电子封装器件的性能以及其可靠性是受该领域研究者们关注的焦点,而不断发展的仿真模拟技术使研究者们看到了解决该问题的希望. 电子封装领域的仿真模拟技术已然成为了微电子芯片技术的重要发展方向之一. 文章从热学、力学及多物理场方面对电子封装领域仿真技术的研究现状进行了介绍,并且也对该领域仿真技术发展所面临的挑战进行了梳理和分析.
- 电子封装 /
- 仿真 /
- 建模
Abstract:
With the continuous development of microelectronic chips, the demand for performance is also increasing, and the improvement of the performance demand also makes the requirements for the size and integration of transistors in the chips rising. In the post Moore era, the cost of chip manufacturing has gradually increased and the process of chip manufacturing become more complex due to the miniaturization of chips. Facing this situation, electronic packaging technology also plays a more important role in realizing diversified, integrated and large-scale chip packaging functions. In the research of electronic packaging technology, how to better predict the performance and reliability of electronic packaging devices has received great attention from researchers, and the continuous development of simulation technology enables researchers to see the hope of solving this problem. Simulation technology of electronic packaging has become one of the important development directions of microelectronic chip technology. This paper introduces the research status of simulation technology in the field of electronic packaging from the aspects of heat, mechanics and multiple physical fields, and also sorts out and analyzes the challenges faced by the development of simulation technology in this field.
- electronic package /
- simulation /
- modeling

HTML全文

图 1 热传导仿真模型^[8]

Figure 1. Thermal conduction simulation model^[8]

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图 2 芯片的结温和移相器内的温度分布^[8]

Figure 2. The junction temperature of the chip and the temperature distribution within the phase shifter^[8]

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图 3 扁平封装结构模拟结果^[9]

Figure 3. The result of a simulation of the flat package structure^[9]

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图 4 环形封装结构的投影波纹技术结果^[9]

Figure 4. Results of projection ripple technology for ring packaging structures^[9]

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图 5 三维集成系统中铜填充的TSV插入器组件示意图^10]

Figure 5. Schematic of a copper-filled TSV inserter component in a 3D integrated system^[10]

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图 6 不同峰值温度下单层TSV结构的热应力（MPa）分布和红色虚线框内的局部视图^[10]

Figure 6. Thermal stress (MPa) distribution of single-layer TSV structures at different peak temperatures and local view within red dashed boxes^[10]

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图 7 不同峰值温度下三层TSV结构的热应力（MPa）分布和红色虚线框内的局部视图^[10]

Figure 7. Thermal stress (MPa) distribution of the three-layer TSV structure at different peak temperatures and a local view within the red dotted box^[10]

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图 8 蠕变耗散能密度分布（J/m³)四个循环后三层TSV结构中的微凸点，以及不同峰值温度下红色虚线框中的微凸点底部视图^[10]

Figure 8. Creep dissipative energy density distribution (J/m3) micro-bumps in a three-layer TSV structure after four cycles, and a view of the bottom of the microconvexes in a red dotted box at different peak temperatures^[10]

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图 9 数字孪生的作用示意图

Figure 9. Schematic diagram of the role of digital twins

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