Abstract: The practical engineering applications of embryonic hardware are currently limited due to the low degree of automation in its application design and the fact that functional differentiation is mainly done manually, which makes it difficult to realize the functional differentiation of large-scale circuits. This paper proposes a hierarchical directed hypergraph description of embryonic hardware functions and its storage method for typical multilayer embryonic hardware structures, and develops a conversion algorithm from regular matching-based hardware language descriptions to hierarchical directed hypergraphs, so as to effectively convert the embryonic hardware function differentiation problem into a hypergraph partitioning problem of different granularity. In order to build a hierarchical directed hypergraph model with different granularity, a hardware language description to directed hypergraph conversion system (Hypergraph For Embryonics, HGFE) is designed and implemented. Experiments and analyses show that the system is applicable to test circuits with tens to tens of thousands of gates, and provides a good graph-theoretic model for functional differentiation of embryonic hardware. Compared with directed acyclic graph, the modeling time is reduced by at least 28.7%, and the storage space is reduced by at least 30.1%, which verifies the superiority of the method.