Abstract: System-in-package realize high-density and high integration packaging technology. At the same time, heat dissipation has attracted much attention. Chip junction temperature prediction is very important in thermal design. In this paper, a micro system thermal resistance model in natural convection environment is established by using the finite element simulation method, and the junction temperature of each chip under the same total power consumption of multiple chips is predicted by the thermal resistance matrix in the model. At the same time, the predicted junction temperature is verified by the thermal resistance test and finite element simulation method. The results show that the error between the thermal resistance matrix model and the thermal resistance test and finite element simulation results is less than 2% and 5% respectively. But at the same time, it is found that the thermal resistance matrix model is not universal. For the multi-chip junction temperature with the change of total power consumption, the prediction result has a large deviation. The fitting curve is established through the functional relationship of each thermal resistance matrix under different total power consumption, and the thermal resistance matrix model is modified. The modified junction environment thermal resistance matrix is suitable for the prediction of chip junction temperature under different total power conditions and different power conditions of each chip. The error between the prediction results and the finite element simulation results of chip junction temperature in thermal resistance test is less than 5%. Therefore, the proposed method of modifying the junction ambient thermal resistance matrix can quickly and conveniently predict the junction temperature of different power chips and accurately predict the heat dissipation performance of devices.