Abstract: According to the requirements of high-speed digital inkjet printing for high bandwidth, low delay, low jitter print data transmission, and high concurrent bit operation orifice control, a domain specific SoC architecture is designed and the software and hardware system is implemented. The lightweight network transmission under StandaloneOS reduces the transmission jitter caused by the operating system and maintains stable and high-speed data transmission; Based on the on-chip high-speed bus, the transmission bandwidth between the main control system and the nozzle control module is improved and the delay of signal transmission is reduced; By designing the bit operation coprocessing module, the high concurrency control of orifice array is realized. The above SoC architecture and system are realized based on ZYNQ7020 FPGA SoC platform. The experimental results show that when the system receives print data from the host computer, the transmission rate of Gigabit Ethernet can be stably maintained at 947 Mbps; The on-chip bus transmission bandwidth can reach 800 MB/s, and the instruction transmission delay is within 10ns; The bit operation data processing frequency of the system can reach 64 MHz; The data throughput of the whole system can reach 1500 Mbit/s, and the data transmission jitter is within 20 ns. The system can drive the printer nozzle with 30720 spray holes to complete the printing work of 200 cm/s with the printing accuracy of 600 dpi. It still has good performance under the printing accuracy of 1200 dpi, which provides a new technical idea for breaking through the speed bottleneck of high-speed digital inkjet printing.