Research of Vertical Reuse Based on UVM
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摘要:
现在片上系统(SOC)的复杂度和集成度越来越高, 这给验证带来了巨大的挑战.传统的验证方法存在各种不足, 在效率方面已经远远达不到生产的要求.UVM是近年来兴起的一种高效的通用验证方法学, 不仅可以缩短验证周期, 而且具有很好的可重用性.UVM验证方法学的可重用主要分为横向的可重用和纵向的可重用, 主要阐述了UVM中纵向可重用的方法, 并以APB总线为例, 描述了从模块级到系统级的验证平台的搭建方法, 这种方法很好地体现了纵向重用提高验证效率的优势.
Abstract:As the complexity and size of SOC(System on chip)grow, verification of design faces huge challenge. There are many defects in the traditional verification so that it can't meet the demand of manufacture in the aspect of efficiency. UVM is a universal verification methodology which springs up in recent years and has high efficiency. It can not only shorten the period of verification, but also can be reused conveniently. The reuse of UVM mainly includes Horizontal reuse and Vertical reuse. This paper focuses on the Vertical reuse and takes the APB bus as example, to expatiate how to build a verification platform from module level to system level. The methodology obviously shows that the Vertical reuse has the advantage of improving verification efficiency.
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Key words:
- UVM /
- vertical reuse /
- APB bus
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表 1 APB从模块的地址范围
APB从模块 地址范围 UART0 ‘h4002_0000 ~’h4002_3FFF UART1 ‘h4002_4000 ~’h4002_7FFF SPI ‘h4001_0000 ~’h4001_3FFF GPIO ‘h4010_0000 ~’h4010_3FFF 表 2 各个模块的sequence重用
顶层序列 模块级序列 描述 u2a_incr_payload uart_ctrl_config_reg_seq UART的寄存器配置序列 uart_incr_payload_seq UART UVC向UART发送数据 intrpt_seq AHB UVC读取UART接收缓存器中的数据 ahb_to_uart_wr AHB UVC向UART UVC发送数据 apb_spi_incr_payload spi_cfg_reg_seq SPI的寄存器配置序列 spi_incr_payload SPI UVC向SPI发送数据 read_spi_rx_reg AHB UVC读取SPI接收缓存中的数据 ahb_to_spi_wr AHB UVC向SPI UVC发送数据 spi_en_tx_reg_seq SPI数据发送使能 apb_gpio_simple_vseq gpio_cfg_reg_seq GPIO的配置寄存器序列 gpio_simple_trans_seq GPIO UVC向GPIO发送数据 read_gpio_rx_reg AHB UVC读取GPIO接收缓存器中的数据 ahb_to_gpio_wr AHB UVC向GPIO UVC发送数据 -
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